Synaptics Launches Astra SR200 Edge AI Chips Built on Google Coral Technology

Synaptics introduced a new family of edge AI microcontrollers on October 20, 2026, aiming to move vision, voice and display processing out of the cloud and into battery-powered devices. The San Jose, California company said the Astra SR200 series targets wearables, connected cameras, streamers, battery-powered sensing devices, and industrial vision and voice systems. It was developed alongside Google, whose open-source Coral neural processing unit design sits at the heart of the new chips.

A Shared Foundation for Device Makers

The company said the range pairs an Arm Cortex-M85 core with a Cortex-M52 core, which it described as the first such combination in the industry, and adds the Synaptics Torq NPU built on the Coral architecture from Google Research. The processors are offered in three pin-compatible tiers under a shared software development kit, so manufacturers can move up or down the range without redesigning their systems. The SR210 delivers 200 GOPS for always-on voice and sensing, the SR230 reaches 300 GOPS and adds vision, display and optional audio, and the SR250 provides 400 GOPS with dual vision and display paths for demanding edge workloads.

Each tier carries up to 256MB of custom DRAM and hardware-rooted security, and the design supports transformer workloads as well as conventional neural networks. Synaptics said the part is suited to physical AI applications, where devices combine voice, vision, audio, motion and contextual sensing and must respond privately in real time. The company argued that traditional microcontroller architectures can no longer deliver the intelligence or user experience such products require.

The launch also widened access to the Coralboard platform, which the two companies developed together. The board lets engineers test models such as Google's Gemma locally before committing the technology to a commercial product. Google open-sourced its Coral NPU architecture in October 2025, choosing to publish the accelerator design for chipmakers to build into their own silicon rather than manufacture processors itself. The architecture uses RISC-V, an open standard for processor instructions, together with software intended to help developers move AI applications between hardware implementations.

A director at Google Research who leads its systems research team said in a briefing that one goal of the effort was to reduce the difficulty developers face when running the same models across the many proprietary chips found in consumer and industrial devices.

Why It Matters for Hardware Careers

The announcement points to a wider shift in how edge AI products are built and who builds them. Running sophisticated models on a microcontroller removes the need for expensive processors, a constant internet connection or hardware that drains device batteries, which lowers the cost of adding intelligence to small products. For engineers, that places a premium on skills in embedded systems development, including firmware, sensor integration and power management, alongside familiarity with AI compilers and runtimes such as the open-source MLIR and IREE toolchain used by the Coral software stack.

The shared development kit and pin-compatible tiers also change how hardware teams plan products. A single software investment can now carry across several device classes, which reduces the cost of entering new markets and shifts hiring toward engineers who can manage a common code base across many hardware targets. The open-source approach gives chip designers at smaller firms access to accelerator technology that was previously available only through proprietary parts.

What to Watch Next

Attention now turns to how quickly manufacturers adopt the platform and whether the open approach attracts more semiconductor partners building on the Coral architecture. Synaptics has positioned the SR200 series around transformer-ready acceleration and scalable memory, and early product launches in wearables and industrial vision will show whether the claimed power efficiency holds in the field. Analysts will also watch pricing and availability across the three tiers, since those factors determine whether the chips reach high-volume consumer devices or remain limited to premium designs.