Electronics, Semiconductor and Embedded Hardware Design

01Purpose and scope

• This manual supports the course Electronics, Semiconductor and Embedded Hardware Design. It describes how working engineers and technicians move a hardware idea from written requirements to a tested board or module, and it is meant to be used alongside the tools, vendor datasheets and internal procedures of the organization doing the work.
• The scope covers board-level analog and digital circuit design, power conversion, sensor and communication interfaces, and embedded platforms built around microcontrollers, system-on-chip devices and programmable logic. It also covers the practical boundary where the hardware designer relies on a semiconductor vendor for device behavior. It does not cover transistor-level chip design, wafer fabrication process engineering, or firmware architecture except where hardware interfaces force a decision.
• Practice changes with context. A consumer prototype may accept a few respins and informal test records, while an industrial controller, a medical device or an automotive module needs formal requirements tracing, controlled documents and documented verification. This guidance does not replace qualified professional judgment, approved company procedures or required authorization, and it should be checked against the rules that apply in regulated fields such as medical devices, automotive safety and aerospace.

02Core principles

• Every design decision should trace back to a requirement. A requirement that says the device must run from a single lithium cell for 48 hours at a specified load drives battery chemistry, converter efficiency, sleep current and the thermal budget. When a requirement is vague, the designer should write down the assumption and get it confirmed before committing parts to a schematic.
• Design with margin and derating. Datasheet absolute maximum ratings are damage limits, not operating targets. Recommended operating conditions are the range over which the vendor guarantees behavior. Capacitors, resistors, inductors and semiconductors should be selected so that voltage, current, power and temperature stay well inside their rated values under worst-case conditions, including startup, fault and cold-start transients.
• Read the whole datasheet and the errata. Many field problems come from a side note on a timing diagram, a footnote on input leakage, or an erratum that changes how a peripheral behaves after a specific silicon revision. Keep a copy of the datasheet revision used for the design in the project record.
• Design for test and debug from the start. Test points, a programming header, a debug connector, status LEDs that are not on the critical path, and jumpers or zero-ohm links for isolating sections are cheap to add early and expensive to retrofit. A board that cannot be probed will be debugged by guesswork.

03Planning and preparation

• Start with a written requirements document that lists functional behavior, electrical limits, environmental range, size, interfaces, power budget, cost target, expected quantities, lifetime and applicable standards. Mark each requirement as must, should or nice to have. Agree on the list with the product owner, firmware lead and manufacturing contact before schematic work begins, because late changes to power or connector requirements are the most disruptive.
• Partition the system into blocks and draw a block diagram with voltage domains, signal types and an estimated current budget per rail. Choose parts by function first, then by constraints: operating temperature, package and assembly method, available interfaces, lifecycle status, supply chain depth, second-source options and tooling cost. A part that is sole-source, end-of-life or only available through long lead times can stop a project after the layout is done. Obtain samples early and check them against the datasheet on the bench.
• Plan the schedule around prototype cycles, not calendar optimism. Estimate the number of board spins, the fabrication and assembly lead times, and the time needed for bring-up and test. Confirm that the lab has oscilloscopes with adequate bandwidth, a programmable power supply with current limit, a logic analyzer, a thermal camera or thermocouples, and an ESD-safe bench. Assign a single owner for each block and name the reviewers who will sign off each stage.

04Recommended workflow

1. 1
   : Freeze the requirements and write the hardware specification. Include a power tree, clock tree, reset strategy, interface list, connector pinout, environmental limits and the test approach for each requirement. Review it with firmware, mechanical and manufacturing contacts.
2. 2
   : Build the block diagram and power budget. Calculate typical, maximum and sleep currents for each rail, add margin for tolerance and temperature, and confirm that the chosen regulators and batteries can supply the peak load. Note the sequencing requirements between rails and the reset dependencies.
3. 3
   : Capture the schematic. Place each part with its full datasheet connections, decoupling capacitors, pull-ups and pull-downs, protection devices, and series resistors where edge rates or reflections matter. Annotate every net that carries a special requirement, such as a low-noise reference, a high-current path or a sensitive analog input.
4. 4
   : Simulate where simulation adds real information. SPICE models are useful for checking a switching regulator loop, a filter response or a bias network. Signal integrity and thermal simulations give estimates, not proof. Record the model source, the assumptions and the parts of the design the model does not capture.
5. 5
   : Lay out the board. Define the layer stackup with the fabricator, place connectors and mechanical features first, then power stages and high-current loops, then decoupling capacitors as close as possible to their device pins. Route differential pairs, clocks and sensitive analog signals with controlled impedance and minimal stubs. Keep return paths continuous, separate noisy switching currents from quiet analog grounds at a defined point, and run design rule checks before generating fabrication and assembly files.
6. 6
   : Order fabrication and assembly. Send the Gerber or equivalent manufacturing data, the bill of materials with approved manufacturer part numbers, pick-and-place data, assembly drawings and a clear note on which parts are sensitive to moisture or electrostatic discharge. Request a first article or a small batch and inspect it before building a larger lot.
7. 7
   : Bring up the hardware. Power the board through a current-limited supply and increase the limit gradually. Measure each rail under no load, then with partial loads, and confirm the power sequence, reset timing, clock startup and programming interface. Bring up one subsystem at a time, and record the measured values next to the expected values so that deviations are visible.
8. 8
   : Verify and release. Run the test procedure against each requirement, including functional, environmental, power and interface tests. Record results, deviations and waivers. Update the schematic, layout and bill of materials to match what was built, issue the release package, and log any errata discovered during bring-up.

05Quality checks, risk controls and compliance

• Use a structured design review at each gate: requirements review, schematic review, layout review and release review. Run electrical rule checks on the schematic, confirm that every pin has an intended state, verify that the bill of materials matches the schematic, and check that each footprint matches the component package drawing. Many costly errors are footprint and pinout mismatches that a second reviewer catches in minutes.
• Common industry references include IPC-2221 for generic printed board design, IPC-A-610 for acceptability of electronic assemblies, JEDEC J-STD-033 for handling of moisture-sensitive devices, IEC 61508 for functional safety of electrical and electronic systems, ISO 26262 for road vehicle functional safety, and IEC 60601 for medical electrical equipment. Each has its own scope and revision history, and whether it applies to a given product depends on the product, the market and the jurisdiction. Confirm current revisions and applicability with the authoritative source and with your compliance function.
• Build risk controls into the hardware itself. Use fuses or electronic current limits on external connections, select creepage and clearance distances appropriate to the working voltage and environment, add reverse polarity protection where users can connect batteries or supplies incorrectly, and specify thermal limits with measured data rather than assumptions. Pre-compliance electromagnetic compatibility checks with near-field probes and a simple test setup can reveal problems before a formal test house is booked. Substance restrictions, export control classifications and labeling rules also vary by jurisdiction and should be checked with the responsible specialists.

06Collaboration and documentation

• Hardware design depends on frequent exchange with firmware developers, mechanical engineers, test engineers, component suppliers and contract manufacturers. Hold a short interface review whenever a connector, pin assignment, timing requirement or power domain changes, and record the decision. Supplier application engineers can answer questions about device behavior, but their advice should be checked against the datasheet and the bench before it is relied upon.
• Keep documents under revision control. The package for a release should include the requirements, block diagram, schematic, layout files, bill of materials with approved alternates, assembly drawing, test procedure, test results, errata list and a change log that explains why each revision changed. Use clear revision letters on the board silkscreen or label so that the physical unit can be matched to its documents. Good records make field returns diagnosable and make the next design faster.
• Write design notes for decisions that a future engineer will question, such as why a particular regulator was chosen, why a sense resistor has a specific value, or why a signal was given a series termination. These notes are short but they prevent the same debate from repeating every project cycle.

07Measures and continuous improvement

• Track a small set of indicators that reflect real outcomes. Useful measures include the share of boards that power up and pass initial bring-up without a respin, the number of respins per project, the count of errata found after release, the variance between estimated and actual bill of materials cost, the time from schematic freeze to first working board, the number of requirements with completed verification evidence, and field return rates for the first production lots. Set targets only after a baseline exists, and interpret them alongside the complexity of each project.
• Hold a short postmortem after each board spin or release. Ask what the design got wrong, what the review missed, what the bench setup could not show, and what process change would catch the problem earlier. Turn repeated findings into checklists, library reviews or design rules, and retire rules that no longer serve the work.
• Be cautious about changing a proven design. A small improvement can introduce a new failure mode, especially in power, thermal or EMC behavior. Make one change at a time where possible, and verify it with the same test procedure used for the baseline.

08Common mistakes and how to prevent them

• A frequent mistake is an incorrect footprint or pin assignment. Prevent it by generating footprints from the manufacturer's land pattern, comparing the schematic symbol against the datasheet pin table, and checking the first assembled board against the drawing before powering it.
• Another common error is weak power integrity. Designers place decoupling capacitors far from their pins, share return paths between noisy switching currents and sensitive analog circuits, or forget the inrush and transient current of a converter. Prevent these by placing decoupling first in the layout, measuring rails under load with an appropriate probe technique, and checking transient response with the actual load step.
• Teams also underestimate thermal behavior and single-source risk. A regulator that is comfortable at room temperature may run hot in an enclosure at the top of the rated range. Prevent this by measuring temperature in the final enclosure, and check the lifecycle and supply status of each part before the layout is committed. Missing test points and unclear reset or sequencing rules are the last common problem, and they are prevented by reviewing the bring-up plan during schematic review rather than after the board arrives.

09Practical checklist

• Requirements are written, numbered and agreed with the product, firmware, manufacturing and test owners.
• Block diagram and power budget show typical, maximum and sleep currents with margin for tolerance and temperature.
• Every part has a datasheet revision recorded, and errata have been reviewed for the selected silicon.
• Schematic has been reviewed for pinout, decoupling, protection, reset, sequencing and test point access.
• Layout has been checked for return paths, decoupling placement, controlled impedance routes and design rule compliance.
• Bill of materials lists approved manufacturer parts and alternates, and lifecycle and supply status have been checked.
• Bring-up plan defines current-limited power on, rail measurements, reset and clock checks, and the programming path.
• Test results, deviations, errata and revision history are recorded in a controlled release package.

★Learning sources

• Micro Degree: Electronics, Semiconductor and Embedded Hardware Design
• Micro Degree: Data Analytics Applications
• Micro Degree: Azure Cloud Fundamentals
• Micro Degree: Google Cloud Platform Basics