Unit
- Silicon as the base material: Silicon dominates commercial chip fabrication because it forms a stable oxide layer, exists abundantly in nature, and its crystal lattice supports predictable electron behavior across a wide temperature range, making it far more manufacturable at scale than germanium or other early semiconductor candidates.
- Energy band theory: Materials are classified as conductors, insulators, or semiconductors based on the gap between their valence band and conduction band; semiconductors have a moderate band gap around 1.1 electron volts for silicon, allowing controlled conduction when energy or doping is introduced.
- Intrinsic versus extrinsic semiconductors: Pure silicon (intrinsic) conducts poorly at room temperature because few electrons cross the band gap naturally, while extrinsic silicon has been deliberately altered through doping to dramatically increase the availability of charge carriers.
- N-type doping mechanism: Introducing pentavalent atoms such as phosphorus or arsenic into the silicon lattice contributes extra free electrons, creating a material where electrons are the majority charge carrier and enabling current flow at lower energy thresholds.
- P-type doping mechanism: Introducing trivalent atoms such as boron creates electron deficiencies called holes, which behave as positive charge carriers that move through the lattice as neighboring electrons fill adjacent vacancies, forming the second building block needed for transistor construction.
- The p-n junction: When p-type and n-type regions meet, diffusion creates a depletion region depleted of mobile carriers, establishing a built-in electric field that permits current flow in one direction under forward bias and blocks it under reverse bias, forming the diode behavior fundamental to all transistor operation.
- Crystal lattice defects and purity: Fabrication requires extremely high silicon purity, often exceeding 99.9999999 percent, because even trace impurities introduce unintended energy states that degrade transistor switching behavior, increase leakage current, and reduce overall chip yield during manufacturing.
- Wafer preparation process: Raw silicon is refined through the Czochralski process into cylindrical ingots, sliced into thin wafers, and polished to an atomically smooth surface, providing the physical substrate on which millions to billions of transistors will later be patterned through lithography.
- Mobility and carrier velocity: Electron mobility in silicon exceeds hole mobility, which is why NMOS transistors historically switch faster than PMOS transistors of equivalent size, a property that directly influences transistor sizing decisions in later CMOS logic gate design.
- Temperature dependence of conduction: Semiconductor conductivity increases with temperature as more electrons gain enough thermal energy to cross the band gap, an effect opposite to metals, which is why thermal management becomes a critical design constraint in high-performance chip packages.
System Architecture
Pattern: Semiconductor Material Stack
Components:
- Substrate layer: the base silicon wafer providing mechanical support and the crystal lattice for device formation
- Doped wells: n-well and p-well regions implanted to host complementary transistor types on the same die
- Gate oxide layer: an ultra-thin insulating layer, typically silicon dioxide or a high-k dielectric, separating the gate electrode from the channel
- Interconnect layers: metal layers stacked above the transistor level to route signals and power across the chip
Quick Revision
- Silicon's stable oxide and abundant supply make it the dominant chip material.
- Doping with pentavalent or trivalent atoms creates n-type and p-type semiconductors.
- The p-n junction's depletion region and built-in field enable one-directional current flow.
- Wafer purity and crystal quality directly determine transistor reliability and chip yield.